M10=0, MAEN1=0, MAEN2=0
UART Control Register 4
OSR | Over Sampling Ratio |
M10 | 10-bit Mode select 0 (0): Receiver and transmitter use 8-bit or 9-bit data characters. 1 (1): Receiver and transmitter use 10-bit data characters. |
MAEN2 | Match Address Mode Enable 2 0 (0): All data received is transferred to the data buffer if MAEN1 is cleared. 1 (1): All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA2 register. If no match occurs, the data is discarded. If match occurs, data is transferred to the data buffer. |
MAEN1 | Match Address Mode Enable 1 0 (0): All data received is transferred to the data buffer if MAEN2 is cleared. 1 (1): All data received with the most significant bit cleared, is discarded. All data received with the most significant bit set, is compared with contents of MA1 register. If no match occurs, the data is discarded. If match occurs, data is transferred to the data buffer. |